The disclosure relates generally to feedthrough wiring, and more specifically, to managing feedthrough wiring for integrated circuits.
Conventionally, development of a processor requires using a hierarchical approach and in consequence sharing wire resources between these levels. Larger low-hierarchy level circuits (sub-units) need access to the expensive high metal layers to support the processor frequency. But the top hierarchy also needs to route connections through the large area of the low-level circuits. The connections are made by sharing by wire tracks or regions. Yet, wire track sharing has a noise impact on the processor circuitry, and sharing wire resources by regions is cumbersome and hard to manage when designing the processor. Further, both of these sharing variants require buffer bays on each ˜500 μm distance. At present, a more elegant means is needed to overcome the concerns of conventional sharing variants.